EDN

Program draws IP cores into IBM’s design flow

SAN MATEO, Calif. — IBM Microelectronics has kicked off a program intended to make sure that intellectual property (IP) cores from third parties work properly with IBM's proprietary design tools when ...
Design-Reuse

IP Cores, Inc. Announces an Ultracompact 3DES IP Core

IP Cores, Inc. announces an ultracompact IP core supporting the NIST FIPS 46-3 Data Encryption Standard (DES) and Triple DES (TDEA). Starting at 3K ASIC gates, DES1 core provides an efficient solution ...
Business Wire

Panasonic Starts Licensing IP Core for Semiconductors Complying with the IEEE 1901–2020 International Standard

OSAKA, Japan--(BUSINESS WIRE)--Panasonic Corporation has begun licensing the HD-PLC TM 4 *1 IP core required for the design of semiconductors with technologies and functions that comply with the IEEE ...
EDN

IP cores from 4i2i fit Actel ASICs

Viterbi and Reed-Solomon encoder and decoder intellectual-property (IP) cores from 4i2i Communications Ltd. have been optimized for use with Actel Corp.'s nonvolatile, single-chip ProASICPlus, ...
Business Wire

Lattice Propel Design Environment Supports New RISC-V Processor and IP Cores

HILLSBORO, Ore.--(BUSINESS WIRE)--Lattice Semiconductor Corporation (NASDAQ: LSCC), the low power programmable leader, today announced a new version of Lattice Propel™, a design environment for ...
Design-Reuse

RISC-V IP: T2M Showcases RISC-V Production IP Core Portfolio for Next-Generation SoCs at CES’26

T2M-IP, a global semiconductor IP provider and ASIC services partner, today announced the global availability of its complete RISC-V CPU IP portfolio, spanning ultra-low-power MCU-class cores to ...
Electronic Design

Turbocoder IP Cores Keep Bit-Error Rates Low

All three cores are available in synthesizable VHDL or Verilog and are verified using Artisan Components' TSMC 0.18-µm standard cell library. They come with cycle- and bit-accurate ANSI C++ or SystemC ...
Electronic Design

Fibre Channel IP Cores Enter FPGA Arena

Fibre Channel intellectual property (IP) cores have been developed for FPGAs, with the cores presently optimized for Stratix, Stratix GX, Cyclone, and Hardcopy devices. Initial offerings include three ...
CNET

Nortel, Avici team on IP core routing

Marguerite Reardon started as a CNET News reporter in 2004, covering cellphone services, broadband, citywide Wi-Fi, the Net neutrality debate and the consolidation of the phone companies. Nortel ...