Evolving Hardware Languages In The Age Of AI And LLMs

This is not about replacing Verilog. It’s about evolving the hardware development stack so engineers can operate at the level of intent, not just implementation.
Electronics For You

JOB: Digital Design Engineer At Texas Instruments In Bengaluru

This is a great opportunity to be part of an established team that’s continuing to look for growth opportunities, working ...
IEEE

A Robust FPGA Router With Optimization of High-Fanout Nets and Intra-CLB Connections

Abstract: Routing is the most time-consuming step in the implementation flow of field programmable gate array (FPGA) designs. With the advance in transistor scaling and system integration, hardware ...
GitHub

WangXuan95/FPGA-LZMA-compressor

An FPGA-based LZMA compressor. For generic lossless data compression. ☁️ LZMA is a popular data compression algorithm, which is defaultly use by ".7z" and ".xz" format. It is also available in ".zip" ...
IEEE

OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit

Abstract: This paper proposes OpenPARF, an open-source placement and routing framework for large-scale FPGA designs 1. OpenPARF is implemented with the deep learning toolkit PyTorch and supports ...
GitHub

USB 2.0 (High-Speed) logic core for FPGAs, using a ULPI PHY, and with AXI-Stream interface.

The core works, and has been tested on a Tang Primer 20K development board, which has a GoWin FPGA, and a ULPI PHY. There is one known bug, where a one byte USB packet (from a device, to a host) will ...